A Los Altos startup called TeRAM came out of stealth this week with $37 million, a plan to bond stacks of SRAM directly onto AI compute dies, and a delivery date that sits three funding rounds into the future. The company says it is "targeting initial customer production in 2029." Everything between now and then, by its own description, is validation.
The round closed September 10 and was announced September 14 on the company's site, with the Business Wire release following on September 15. Primary Venture Partners led, with B Capital, Hyperion, and SemiAnalysis Capital as co-leads, and Alumni Ventures and Lightscape Partners joining. TeRAM's founder and CEO is Charlie Cheng, who previously ran memory IP firm Kilopass until its sale to Synopsys and, per a SemiWiki interview published alongside the launch, worked on multiple generations of Meta's MTIA accelerators starting in 2019. Cheng told SemiWiki that TeRAM "spun out of Kilopass in 2018" and only raised its seed capital this year, which means the company has been operating quietly for roughly eight years before taking outside money.
The pitch is a familiar one dressed in a new package. TeRAM argues the "memory wall" has moved. During the training era the constraint was HBM capacity; since mid-2025, the company says, agentic inference has overtaken training as the main consumer of compute, and the constraint is now bandwidth during decode, because "generating each output token requires a pass through the entire model and its trillions of parameters." Its answer is to put SRAM, the fastest and most power-hungry kind of memory per bit, in a 3D stack sitting on top of the compute chip rather than beside it on an interposer, and to sell that stack customized per customer.
"Memory is the constraint on AI progress, and incremental improvements will not be enough," said Brian Schechter, the Primary partner who led the round. "He is a rare founder who connects AI architecture, memory physics, and semiconductor manufacturing, and has assembled an extraordinary team to realize his vision."
Cheng was more cautious in his own statement. "Developing a new memory technology is an ambitious undertaking," he said. "We are fortunate to have investors who back our vision with both capital and hands-on support."
What TeRAM will not say is how the memory actually works. In the SemiWiki interview Cheng declined to disclose the technology, offering only that "much is needed to extend the current DRAM and HBM roadmap to integrate with hybrid-bonding while waiting for the true 3D DRAM bit-cell mass production. So there is a window of opportunity for a new way of solving the Memory Wall problem." The business model, he said, resembles Broadcom's custom ASIC unit: hyperscalers or chip companies supply specifications and TeRAM builds a memory die to match their compute die. The company claims its founders have more than 80 years of combined memory experience and lists "development centers and fabrication partner in Asia" without naming the partner.
Why It Matters
TeRAM is the third memory-first inference bet to raise money this month, and by far the smallest and slowest. Positron closed $875 million at a $5 billion valuation on September 10 for an accelerator that swaps HBM for commodity LPDDR5X, with up to 2.3 TB per chip and a tape-out on TSMC N3P by year end. Cerebras has shipped wafer-scale parts with 44 GB of on-chip SRAM and 21 PB/s of bandwidth for years. Groq built its whole architecture on SRAM. Each of those companies had to build the compute too. TeRAM's wager is that a merchant SRAM die, bonded on top of someone else's accelerator, is a product hyperscalers will buy rather than design in-house or get from TSMC's own SoIC stacking roadmap.
The incumbent that TeRAM is really racing is HBM4. Samsung and SK hynix both moved HBM4 into mass production in February, SK hynix showed a 16-high stack at CES delivering 48 GB and roughly 2 TB/s per stack, and Nvidia's Rubin GPUs ship with eight stacks and about 22 TB/s aggregate. Samsung said in August it had reached about 80 percent yield. By 2029, when TeRAM hopes to ship its first customer part, the DRAM makers will be on HBM4E or HBM5, and AMD's MI400 series and Nvidia's post-Rubin parts will have absorbed whatever bandwidth gains those bring. A startup does not get to compete against today's HBM; it competes against the HBM of its ship date.
The physics is also not on the side of the easy story. SRAM cells stopped scaling meaningfully at 3nm, which is why Cerebras and Groq spend so much silicon area on it; that is a fixed cost TeRAM inherits. Stacking memory on top of a compute die that dissipates 1,000 watts or more puts the memory directly in the hottest part of the package, and TeRAM's own language that the chips are "designed for demanding thermal conditions" acknowledges that problem without resolving it. Hybrid bonding yields are a known pain point even for TSMC's mature flows. And $37 million buys tape-outs at an older node, not a 2nm SRAM stack with production-grade bonding. The company itself says the money is to "validate its technology and scale the team," which is the language of a pre-silicon company, not a pre-production one.
None of this makes the bet unreasonable. SemiAnalysis Capital co-leading is notable, since that firm's analysts have been among the loudest voices arguing that inference economics are memory-bound. Primary and B Capital are not deep-tech specialists, which suggests the round was priced on the founder's Kilopass and MTIA track record rather than on demonstrated silicon.
What to Watch
The signals that matter are a named foundry or OSAT partner for the bonding step, a disclosed customer or co-development agreement with a hyperscaler, and any test-chip data on bandwidth per watt against an HBM4 baseline. TeRAM has a 2029 production target and roughly $37 million to reach it, which implies a Series A in 2027 at the latest; whether that round is led by a strategic, such as a hyperscaler or a memory vendor, will say more about the technology's credibility than any press release. Until then, the company has a thesis that the industry broadly agrees with and a solution it will not describe.
"Developing a new memory technology is an ambitious undertaking. We are fortunate to have investors who back our vision with both capital and hands-on support."— Charlie Cheng, Founder and CEO, TeRAM