ChangXin Memory Technologies said on Sunday that its fifth-generation DRAM platform is in mass production, with memory-array features spaced 11.95 nanometers apart and built entirely on deep-ultraviolet lithography tools that predate the US ban on shipping ASML's EUV machines to China. Two 24-gigabit LPDDR5X chips made on the process are already inside Chinese flagship phones. What CXMT did not announce, at the World Manufacturing Convention in its home city of Hefei, is any product that goes into an AI accelerator.

That distinction matters more than the nanometer figure. The G5 announcement is real evidence that export controls have slowed rather than stopped Chinese memory scaling. It is not evidence that CXMT can sell into the part of the memory market where the money now sits.

"Our process capability is now on par with the most advanced mass-produced nodes out there in the industry," CXMT Vice President Luo Xiaodong, who heads the company's marketing center, told the convention.

The company's own statement was more careful. G5, it said in a release carried by the Global Times, features "an active area half-pitch of 11.95 nm for memory arrays, closing the gap with the world's most advanced volume-production memory platforms." Closing, not closed.

CXMT reached the 11.95nm figure with self-aligned quadruple patterning, a technique that uses four aligned DUV exposures to print features that a single EUV pass would draw directly. The company also disclosed a 45:1 aspect ratio on the array capacitor, a DRAM-tuned high-k metal gate process, and a core cell array height cut to 6,762 nanometers. On an 8Gb-equivalent basis, gross dies per wafer rise at least 50 percent over the fourth-generation platform. The two LPDDR5X parts come in 496-ball and 245-ball packages and hold 3 gigabytes per die, 50 percent more than the 16Gb parts they replace. CXMT said DDR5 is also built on the platform.

Two numbers were missing. CXMT did not disclose yields, and it did not disclose monthly G5 output. The 50 percent die-count gain counts total dies before defect screening, which is not the same thing as the good dies that actually ship. Seoul Economic Daily also noted that 11.95nm measures one specific structure and is hard to line up against the "12-nanometer-class" node names Samsung, SK hynix and Micron use for their own products. Samsung and SK hynix have moved on to 10nm-class processes for their leading parts.

The Eastern Herald, which was more enthusiastic than most about the achievement, still flagged that Luo's on-par claim was made at a state-organized forum in front of domestic suppliers and investors, and that no outside foundry or research institution has benchmarked the process. Quadruple patterning "is slower, more expensive per step, and more sensitive to defects than EUV," the paper wrote. "It also, apparently, works."

Ma Jihua, a veteran telecom analyst quoted by the Global Times, said the global DRAM market is still dominated by Samsung, SK hynix and Micron, which is why a fourth player's progress draws scrutiny. He framed the gain as one of supply-chain resilience and sourcing options for downstream manufacturers rather than a change in the technology leader.

Why It Matters

CXMT's rise is already a market fact. TrendForce puts the company at 9.5 percent of global DRAM revenue in the second quarter, fourth behind the incumbents; Counterpoint Research has it at 10 percent, with Samsung at 38 to 39 percent, SK hynix at 25 to 26 percent and Micron at 25 percent. By Counterpoint's count that is the first time in more than a decade that the big three together hold less than 90 percent. The company's Shanghai STAR Market listing in late July raised roughly $8.6 billion at 212 times oversubscription, and Micron and SK hynix shares fell on its debut day. The IPO prospectus earmarked proceeds for G5, HBM research and capacity, which is now around 300,000 wafers a month and targeted at 350,000 to 375,000 by year-end, with Korean press reporting a 550,000 to 600,000 target by 2028, close to SK hynix's roughly 590,000.

But that share is almost entirely commodity DRAM and mobile LPDDR sold into Chinese handsets. The segment where Samsung and SK hynix earn their margins is high-bandwidth memory for Nvidia and other accelerator vendors, and G5 says nothing about it. CXMT's HBM3E is reported to be in trial production, and its prospectus listed HBM as a long-term goal with no timeline. Meanwhile Samsung shipped HBM4 in volume in February, booked $1 billion in HBM sales within four months, and grew its HBM share to 33 percent in the second quarter against SK hynix's 50 percent. Citi expects DRAM demand to grow 30 percent in 2027 and 35 percent in 2028 against supply growth of 19 and 22 percent, and attributes the gap to HBM and server DDR5, not phones.

Where G5 does bite is commodity pricing. Acer chairman Jason Chen said at a Taipei forum on Saturday that PC memory is no longer in short supply as Chinese capacity ramps, and that parts such as LPDDR5 and DDR5-9600 now have more sellers than buyers. If CXMT can flood DDR4, standard DDR5 and LPDDR5X while the incumbents pivot capacity to HBM, the big three lose the ability to defend commodity prices. That is the trade Samsung and SK hynix have knowingly made. The Sunday announcement was a reminder of what it costs.

For Washington, G5 is the clearest case yet that the 2022 EUV cutoff, built on the assumption that DUV multipatterning would exhaust itself around this node, has a longer runway than its designers expected. CXMT remains off the Entity List; Apple lobbied the White House earlier this year to keep it off the Pentagon blacklist, and was turned down.

What to Watch

The announcement landed on a Sunday, so the first Samsung and SK hynix trading reaction comes Monday in Seoul. Beyond that, watch for any independent teardown of a G5 LPDDR5X part, for CXMT to publish yields or monthly output over the coming quarters, for a dated HBM3E ship schedule rather than a trial-production rumor, and for whether the Commerce Department responds to a Chinese fab hitting sub-12nm without EUV by tightening the DUV tool list too.

"Our process capability is now on par with the most advanced mass-produced nodes out there in the industry."
— Luo Xiaodong, Vice President and Head of Marketing Center, CXMT
11.95nm
Active-area half-pitch, via SAQP without EUV
50%+
More gross dies per wafer vs. G4
9.5%
CXMT share of global DRAM revenue, Q2 2026 (TrendForce)
$8.6B
Raised in July STAR Market IPO, 212x oversubscribed